Add support for riscv32-unknown-none-elf targets #530
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Pull Request Overview
This PR adds support for bare metal RISC-V 32-bit targets (riscv32-unknown-none-elf) to the LLVM toolchain configuration. The changes enable building for ESP32 RISC-V boards that don't require a sysroot.
- Adds
("none", "riscv32")to supported targets and no-sysroot targets lists - Maps
none-riscv32to theriscv32-unknown-none-elftarget triple - Configures toolchain parameters for the new RISC-V 32-bit bare metal target
Reviewed Changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| toolchain/internal/common.bzl | Adds riscv32 to supported targets and no-sysroot targets |
| toolchain/internal/configure.bzl | Fixes tuple comparison bug and adds target triple mapping |
| toolchain/cc_toolchain_config.bzl | Adds toolchain configuration for riscv32-none target |
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FYI @kitterion should we add some documentation in the customization section of the main README.md file to explain how to add riscv? Similarly we could do the some for IBM targets and anything else that we support but have no direct entries for in the repo. |
|
That sounds great. The issue is currently it's a bit awkward to specify the particular flavour of riscv one wants to use. For example, my riscv32 toolchain declaration looks like this llvm.toolchain(
name = "llvm_toolchain_esp32_c6",
llvm_version = LLVM_VERSION,
stdlib = {"none-riscv32": "none"},
compile_flags = {
"none-riscv32": [
# https://github.com/espressif/esp-idf/blob/v5.5/tools/cmake/toolchain-clang-esp32c6.cmake#L14
"-march=rv32imac_zicsr_zifencei",
"-mabi=ilp32",
# Default flags
"--target=riscv32-unknown-none-elf",
"-U_FORTIFY_SOURCE",
"-fstack-protector",
"-fno-omit-frame-pointer",
"-fcolor-diagnostics",
"-Wall",
"-Wthread-safety",
"-Wself-assign",
],
},
link_flags = {
"none-riscv32": [
# https://github.com/espressif/esp-idf/blob/v5.5/tools/cmake/toolchain-clang-esp32c6.cmake#L14
"-march=rv32imac_zicsr_zifencei",
"-mabi=ilp32",
# Default flags
"--target=riscv32-unknown-none-elf",
"-no-canonical-prefixes",
"-fuse-ld=lld",
"-Wl,--build-id=md5",
"-Wl,--hash-style=gnu",
"-Wl,-z,relro,-z,now",
"-nostdlib",
],
},
)
llvm.sysroot(
name = "llvm_toolchain_esp32_c6",
targets = ["none-riscv32"],
label = "//:empty",
)
llvm.extra_target_compatible_with(
name = "llvm_toolchain_esp32_c6",
targets = ["none-riscv32"],
constraints = ["//platforms:esp32_c6_constraint"],
)A few notes about that:
I'm not sure |
This adds support for bare metal riscv32 targets that don't need a sysroot. I have an esp32 riscv board that I'm building for, and to set up an appropriate toolchain, `toolchains_llvm` needs to know about it.
3 participants
This adds support for bare metal riscv32 targets that don't need a sysroot.
I have an esp32 riscv board that I'm building for, and to set up an appropriate toolchain,
toolchains_llvmneeds to know about it.